Elixir M2F4G64CB8HB5N-CG Ficha de datos descargar pdf

M2F1G64CBH4B5(9)P / M2F2G64CB88B7(H)N / M2F4G64CB8HB5(9)N

1GB: 128M x 64 / 2GB: 256M x 64 / 4GB: 512M x 64

PC3-8500 / PC3-10600 / PC3-12800

Unbuffered DDR3 SDRAM DIMM

REV 1.1 1

10/2010

NANYA reserves the right to change products and specifications without notice.

Based on DDR3-1066/1333 128Mx16 (1GB) and DDR3-1066/1333/1600 256Mx8 (2GB/4GB) SDRAM B-Die

Features

•Performance:

• 240-Pin Dual In-Line Memory Module (UDIMM)

•128Mx64 (1GB) / 256Mx64 (2GB) / 512Mx64 (4GB) DDR3

Unbuffered DIMM based on 256Mx8 DDR3 SDRAM B-Die

devices.

• Intended for 533MHz/667MHz/800MHz applications

• Inputs and outputs are SSTL-15 compatible

• V

= V

DDQ

= 1.5V ±0.075V

• SDRAMs have 8 internal banks for concurrent operation

• Differential clock inputs

• Data is read or written on both clock edges

• DRAM DLL aligns DQ and DQS transitions with clock transitions.

• Address and control signals are fully synchronous to positive

clock edge

• Nominal and Dynamtic On-Die Termination support

• Halogen free product

• Programmable Operation:

- DIMM  Latency: 6, 7, 8/PC3-8500; 6, 7, 8, 9/PC3-10600; 6,

7, 8, 9, 10, 11/PC3-12800

- Burst Type: Sequential or Interleave

- Burst Length: BC4, BL8

- Operation: Burst Read and Write

• Two different termination values (Rtt_Nom & Rtt_WR)

• 14/10/1 (row/column/rank) Addressing for 1GB

• 15/10/1 (row/column/rank) Addressing for 2GB

• 15/10/2 (row/column/rank) Addressing for 4GB

• Extended operating temperature rage

• Auto Self-Refresh option

• Serial Presence Detect

• Gold contacts

•1GB: SDRAMs are in 96-ball BGA Package

• 2GB: SDRAMs are in 78-ball BGA Package

• 4GB: SDRAMs are in 78-ball BGA Package

• RoHS compliance

Description

M2F1G64CBH4B5(9)P / M2F2G64CB88B7(H)N / M2F4G64CB8HB5(9)N are 240-Pin Double Data Rate 3 (DDR3) Synchronous DRAM

Unbuffered Dual In-Line Memory Module (UDIMM), organized as one rank of 128Mx64 (1GB) / 256Mx64 (2GB) and two ranks of 512Mx64

(4GB) high-speed memory array. Modules use four 128Mx16 (1GB) 96-ball BGA packaged devices, eight 256Mx8 (2GB) 78-ball BGA

packaged devices and sixteen 256Mx8 (4GB) 78-ball BGA packaged devices. These DIMMs are manufactured using raw cards developed

for broad industry use as reference designs. The use of these common design files minimizes electrical variation between suppliers. All

Elixir DDR3 SDRAM DIMMs provide a high-performance, flexible 8-byte interface in a space-saving footprint.

The DIMM is intended for use in applications operating of 533MHz/667MHz/800MHz clock speeds and achieves high-speed data transfer

rates of 1066Mbps/1333Mbps/1600Mbps. Prior to any access operation, the device  latency and burst/length/operation type must be

programmed into the DIMM by address inputs A0-A13 (1GB) / A0-A14 (2GB/4GB) and I/O inputs BA0~BA2 using the mode register set

cycle.

The DIMM uses serial presence-detect implemented via a serial EEPROM using a standard IIC protocol. The first 128 bytes of SPD data

are programmed and locked during module assembly. The remaining 128 bytes are available for use by the customer.

Speed Sort

PC3-8500

PC3-10600

PC3-12800

Unit

-BE

-CG

-DI

DIMM CAS Latency

fck – Clock Frequency

533

667

800

MHz

tck – Clock Cycle

1.875

1.5

1.25

fDQ – DQ Burst Frequency

1066

1333

1600

Mbps

1 2 3 4 5 6 ... 30 31