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M2F1G64CBH4B5(9)P / M2F2G64CB88B7(H)N / M2F4G64CB8HB5(9)N

1GB: 128M x 64 / 2GB: 256M x 64 / 4GB: 512M x 64

PC3-8500 / PC3-10600 / PC3-12800

Unbuffered DDR3 SDRAM DIMM

REV 1.1 2

10/2010

NANYA reserves the right to change products and specifications without notice.

Ordering Information

Part Number

Speed

Organization

Power

Leads

Note

M2F1G64CBH4B5P-BE

DDR3-1066

PC3-8500

533MHz (1.875ns @ CL = 7)

128Mx64

1.5V

Gold

M2F1G64CBH4B5P-CG

DDR3-1333

PC3-10600

667MHz (1.5ns @ CL = 9)

M2F2G64CB88B7N-BE

DDR3-1066

PC3-8500

533MHz (1.875ns @ CL = 7)

256Mx64

M2F2G64CB88B7N-CG

DDR3-1333

PC3-10600

667MHz (1.5ns @ CL = 9)

M2F4G64CB8HB5N-BE

DDR3-1066

PC3-8500

533MHz (1.875ns @ CL = 7)

512Mx64

M2F4G64CB8HB5N-CG

DDR3-1333

PC3-10600

667MHz (1.5ns @ CL = 9)

M2F4G64CB8HB5N-DI

DDR3-1600

PC3-12800

800MHz (1.25ns @ CL=11)

M2F1G64CBH4B5P-BE

DDR3-1066

PC3-8500

533MHz (1.875ns @ CL = 7)

128Mx64

M2F1G64CBH4B5P-CG

DDR3-1333

PC3-10600

667MHz (1.5ns @ CL = 9)

M2F1G64CBH4B5P-DI

DDR3-1600

PC3-12800

800MHz(1.25ns @ CL=11)

M2F2G64CB88B7N-BE

DDR3-1066

PC3-8500

533MHz (1.875ns @ CL = 7)

256Mx64

M2F2G64CB88B7N-CG

DDR3-1333

PC3-10600

667MHz (1.5ns @ CL = 9)

M2F2G64CB88B7N-DI

DDR3-1600

PC3-12800

800MHz(1.25ns @ CL=11)

M2F4G64CB8HB5N-BE

DDR3-1066

PC3-8500

533MHz (1.875ns @ CL = 7)

512Mx64

M2F4G64CB8HB5N-CG

DDR3-1333

PC3-10600

667MHz (1.5ns @ CL = 9)

M2F4G64CB8HB5N-DI

DDR3-1600

PC3-12800

800MHz (1.25ns @ CL=11)

Pin Description

Pin Name

Description

Pin Name

Description

CK0, CK1

Clock Inputs, positive line

DQ0-DQ63

Data input/output

, 

Clock Inputs, negative line

DQS0-DQS8

Data strobes

CKE0, CKE1

Clock Enable

-

Data strobes complement



Row Address Strobe

DM0-DM8

Data Masks



Column Address Strobe



Temperature event pin



Write Enable



Reset pin

, 

Chip Selects

REFDQ

, V

REFCA

Input/Output Reference

A0-A9, A11, A13-A15

Address Inputs

DDSPD

SPD and Temp sensor power

A10/AP

Address Input/Auto-Precharge

SA0, SA1

Serial Presence Detect Address Inputs

A12/

Address Input/Burst Chop

Vtt

Termination voltage

BA0-BA2

SDRAM Bank Address Inputs

Ground

ODT0, ODT1

Active termination control lines

Core and I/O power

SCL

Serial Presence Detect Clock Input

No Connect

SDA

Serial Presence Detect Data input/output

1 2 3 4 5 6 7 ... 30 31

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