
M2N1G64TUH8G5F / M2S1G64TUH8G4F / M2N2G64TU8HG5B / M2N2G64TU8HG4B
1GB: 128M x 64 / 2GB: 256M x 64
PC2-5300 / PC2-6400
Unbuffered DDR2 SO-DIMM
REV 1.0 9
© NANYA TECHNOLOGY CORPORATION
NANYA reserves the right to change products and specifications without notice.
Serial Presence Detect (2GB – 2 Ranks, 128Mx8 DDR2 SDRAMs) (Part 1 of 2)
Serial PD Data Entry (Hex.)
Number of Serial PD Bytes Written during Production
Total Number of Bytes in Serial PD device
Number of Row Addresses on Assembly
Number of Column Addresses on Assembly
Number of DIMM Ranks, Package, and Height
Voltage Interface Level of this Assembly
DDR2 SDRAM Device Cycle Time at CL=5
DDR2 SDRAM Device Access Time (t
ac
) from Clock at CL=5
Error Checking DDR2 SDRAM Device Width
DDR2 SDRAM Device Attributes: Burst Length Supported
DDR2 SDRAM Device Attributes: Number of Device Banks
DDR2 SDRAM Device Attributes: Latencies Supported
DIMM Mechanical Characteristics
DDR2 SDRAM DIMM Type Information
DDR2 SDRAM Module Attributes
DDR2 SDRAM Device Attributes: General
Minimum Clock Cycle at CL=4
Maximum Data Access Time from Clock at CL=4
Minimum Clock Cycle Time at CL=3
Maximum Data Access Time from Clock at CL=3
Minimum Row Precharge Time (t
RP
)
Minimum Row Active to Row Active delay (t
RRD
)
Minimum to delay (t
RCD
)
Minimum Active to Precharge Time (t
RAS
)
Address and Command Setup Time Before Clock (t
IS
)
Address and Command Hold Time After Clock (t
IH
)
Data Input Setup Time Before Clock (t
DS
)
Data Input Hold Time After Clock (tDH)
Write Recovery Time (t
WR
)
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